In a strategic move to maintain its dominance in the AI hardware market, NVIDIA is actively working to accelerate the timeline for next-generation memory technology implementation.
NVIDIA's Urgent Request to SK Hynix
NVIDIA CEO Jensen Huang has made a formal request to SK Hynix Group Chairman Chey Tae-won to expedite the delivery of HBM4 memory by six months. This request, made during the SK AI Summit in Seoul, aims to shift the delivery timeline from the latter half of 2025 to early 2025, demonstrating NVIDIA's urgency to maintain its competitive edge in the AI hardware market.
Technical Advancements of HBM4
The next-generation HBM4 represents a significant leap in memory technology, introducing a novel multi-functional approach that integrates memory and logic semiconductors into a single package. This integration eliminates the need for separate packaging technology, potentially streamlining the manufacturing process and improving performance efficiency. The technology will support memory layers of 24Gb and 32Gb, with various stacking options from 4-high to 16-high TSV stacks.
Manufacturing Partnership and Process Technology
SK Hynix has partnered with TSMC for the production of HBM4 base dies, utilizing both 12FFC+ (12nm-class) and N5 (5nm-class) process technologies. The N5 process will enable higher logic density and improved interconnect capabilities, while the 12FFC+ process offers a more cost-effective solution through silicon interposers. This dual approach allows for flexibility in meeting different performance and cost requirements.
Market Competition and Future Developments
While SK Hynix has already achieved tape-out status for HBM4, competitors Samsung and Micron are also in the race to develop this technology. SK Hynix plans to launch 12-layer HBM4 next year, followed by a 16-layer version by 2026. The company's choice of production technology is currently under review, particularly after Samsung's decision to use more advanced 1c production technology for their HBM4 development.