AMD's upcoming Zen 6-based mobile processors, codenamed Medusa Point, are generating buzz in the tech community with rumors of dramatically increased core counts but potentially reduced graphics capabilities. These next-generation APUs represent a significant architectural shift in AMD's mobile strategy, prioritizing CPU performance while making interesting tradeoffs in the graphics department.
Massive Core Count Increase
According to recent leaks, AMD's Medusa Point APUs will feature a revolutionary hybrid core design that could deliver up to 22 cores in high-end Ryzen 9 models. This represents a dramatic increase compared to current-generation Strix Point processors. The new architecture will reportedly utilize AMD's chiplet design capability (CDD) that allows for significantly more cores per chiplet than previous generations. While Zen 1 through Zen 5 architectures were limited to 8 cores per CCD (Core Complex Die), Zen 6 chiplets can reportedly house up to 12 cores, enabling this substantial core count increase.
Hybrid Core Architecture
The Medusa Point lineup will reportedly feature a sophisticated hybrid core arrangement. For mainstream Ryzen 5 and Ryzen 7 models, the configuration is expected to include 4 classic Zen 6 cores, 4 dense Zen 6c cores, and 2 new low-power (LP) cores, totaling 10 cores. These low-power cores are likely optimized for maximum efficiency with specialized voltage and frequency characteristics. The premium Ryzen 9 models take this further by adding a dedicated 12-core CCD on top of the 10-core configuration, bringing the total to an impressive 22 cores. This hybrid approach allows AMD to optimize for different workload types while maintaining power efficiency.
AMD Medusa Point Rumored Specifications:
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Ryzen 5/7 Configuration:
- 4 Classic Zen 6 cores
- 4 Dense Zen 6c cores
- 2 Low Power (LP) cores
- 8 CU RDNA 3.5+ integrated graphics
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Ryzen 9 Configuration:
- 12-core Zen 6 CCD
- 4 Classic Zen 6 cores
- 4 Dense Zen 6c cores
- 2 Low Power (LP) cores
- 8 CU RDNA 3.5+ integrated graphics
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Expected Manufacturing:
- Mainstream models: TSMC 3nm-class node
- Ryzen 9 CCD: Possibly TSMC N2 process
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Expected Release Timeline:
- Early 2027
Graphics Downgrade Raises Questions
Perhaps surprisingly, the leaks suggest that Medusa Point will feature a reduced graphics component compared to its predecessor. While current Strix Point APUs feature 16 Compute Units (CUs) in their integrated GPU, Medusa Point is rumored to drop to just 8 CUs based on an RDNA 3.5+ architecture. This represents a significant reduction in raw graphics processing capability, though the newer architecture may partially offset the reduction. For context, the Radeon 860M with 8 CUs performs approximately 23% slower than the Radeon 890M with 12 CUs, according to cited benchmarks. This suggests AMD may be prioritizing CPU performance and efficiency over graphics capabilities in this generation.
Graphics Performance Comparison:
- Current Radeon 890M (16 CU): Baseline performance
- Rumored Medusa Point iGPU (8 CU): Expected reduction in raw graphics capability
- Reference point: Radeon 860M (8 CU) performs ~23% slower than Radeon 890M (12 CU)
Manufacturing and Timeline
Medusa Point will likely utilize advanced manufacturing processes, with speculation pointing to TSMC's 3nm-class node for the mainstream models. The higher-end Ryzen 9 variants may employ an MCM (Multi-Chip Module) design, combining the 10-core chiplet containing I/O and integrated graphics with a separate 12-core CCD potentially manufactured on TSMC's cutting-edge N2 process. Given the current timeline, Medusa Point is not expected to reach the market until early 2027, with AMD likely introducing a Strix Point refresh called Gorgon Point as an intermediate step.
Competitive Positioning
When Medusa Point eventually launches, it will face competition from Intel's upcoming architectures. Based on preliminary specifications, AMD may hold an advantage in raw CPU performance against Intel's Panther Lake, but depending on the exact launch timing, Medusa Point might end up competing against Intel's Nova Lake instead. The reduced graphics capabilities could be a strategic decision to free up die space for other components, possibly including enhanced AI processing capabilities, though specific details about memory controllers, NPU configurations, and cache hierarchies remain unknown.
RDNA 3.5+ Graphics Architecture
While the reduction in CU count represents a downgrade on paper, the RDNA 3.5+ architecture may bring improvements, particularly in machine learning capabilities. This could potentially enable support for AMD's future FSR 4 upscaling technology. However, some observers have noted that RDNA 4 would have been a more substantial upgrade for the graphics component. The decision to stick with RDNA 3.5+ might be related to AMD's development timeline, as the company's next-generation UDNA 1/RDNA 5 graphics architecture is expected to arrive around the same timeframe as Medusa Point.